1. Field of Invention
This invention relates to a manufacturing method of a flip chip package. More particularly, the present invention is related to a manufacturing method of flip chip package regarding to a flip chip package process for ensuring the filler provided in the underfill well and equally distributed after performing curing process.
2. Related Art
In this information explosion age, integrated circuits products are used almost everywhere in our daily life. As fabricating technique continue to improve, electronic products having powerful functions, personalized performance and a higher degree of complexity are produced. Nowadays, most electronic products are relatively light and have a compact body. Hence, in semiconductor production, various types of high-density semiconductor packages have been developed. Flip chip is one of the most commonly used techniques for forming an integrated circuit package. Moreover, compared with a wire-bonding package or a tape automated bonding (TAB) package, a flip-chip package has a shorter electrical path on average and has a better overall electrical performance. In a flip-chip package, the bonding pads on a chip and the contacts on a substrate are connected together through a plurality of bumps. Accordingly, the technology of flip-chip bonding process becomes more and more important in the advanced packaging fields.
As mentioned above, flip chip packaging technology is performed by providing a chip with bonding pads disposed on the active surface and arranged in an area array, forming bumps on the bonding pads, flipping the chip to mount the bumps to the substrate so as to electrically and mechanically connect the chip and the substrate. Next, an underfill is filled in the gap between the substrate and the chip. Afterwards, a curing process is performed to harden the underfill to form a buffer layer between the chip and the substrate. In such a manner, the buffer layer will prevent from the warpage of the substrate and the crack of the chip due to the difference in coefficient of thermal expansion between the substrate and the chip.
Referring to FIG. 1, it illustrates an enlarged cross-sectional view of the manufacturing method of a conventional flip chip package. Therein, as shown in FIG. 1, a chip 100 is provided, wherein the chip 100 has an active surface 101 and a plurality of bonding pads 102 and bumps 104 formed on the bonding pads 102. Next, the chip 100 is flipped to mount to the upper surface 202 of the substrate 200 through the bumps 104 in a flip-chip connection fashion.
Then, referring to FIG. 2, a process of filling the underfill 400 in the gap 300 between the chip 100 and the substrate 200 is performed. Generally speaking, the underfill 400 comprises epoxy and fillers, wherein the epoxy is made of hardening, resin, colorant and promoter and the fillers, with a weight percent ranged from about 70% to 80%, are made of the silicon powder. The silicon powder is utilized to lower the coefficient of the thermal expansion of the underfill and keeps the rigidity of the underfill. Accordingly, when the silicon powder is equally and well distributed in the underfill, the attachment of the substrate 200 to the chip 100 will be upgraded and the reliability of the assembly package will be enhanced.
As mentioned above, when the underfill 400 is filled in the gap 300 between the chip 100 and the substrate 200 and a curing process is performed to harden the underfill 400, the fillers with a larger size will be distributed and located close to the substrate 200 and the fillers with a smaller will be located close to the chip 100 and disposed above the larger fillers due to the gravity effect. Accordingly, the fillers are not well and equally distributed. Thus, the reliability of the assembly package will be declined.
Therefore, providing another manufacturing method of flip chip package to solve the mentioned-above disadvantages is the most important task in this invention.